Design of Configurable Booth Multiplier Using Dynamic Range Detector
نویسندگان
چکیده
The main objective of this paper is to provide a solution for VLSI designers to design configurable Booth Multiplier that supports single 4-bit, single 8-bit, single 12-bit or single 16-bit multiplication. Multiplication is one of the basic functions used in digital signal processing for computation. Therefore, we need efficient algorithms to reduce the computations. Hence in order to minimize the number of cycles, a dynamic range detection technique is introduced to dynamically detect the effective dynamic ranges of two input operands so as to make the booth multiplier configurable. Using this technique, the unnecessary computation is truncated, so that the computation is done on the significant bits of both the operands.
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